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That hardware multiprogramming concept showed up a few times. The CDC 6600 pretended to have 10 peripheral processors for I/O using that approach. National Semiconductor (I think) once made a part which had two BASIC interpreters on one CPU with two sets of registers.

TI had some IC where the registers were in main memory, with a hardware register to point to them. Context switching didn't require a register save, just pointing the register pointer somewhere else. There were stack machines such as the B5500 where the top items on the stack were in hardware registers but the rest of the stack was in memory. Floating point in the early years of floating point co-processor chips had lots of rather special registers. Getting data in and out of them was sometimes quite slow, so it was desirable to get data into the math co-processor and work on it there without bringing it back into memory if at all possible.

Lots of variations on this theme. There's a lot going on with special-purpose registers today inside superscalar processors, but the programmer can't see most of it.



Even more variations encompass the alternate register file (A', F', BC', DE', HL') of the Zilog Z80 and the alternate supervisor-mode A7 register in the MC680xx processors.


Are you thinking of TI's TMS9900 processor, which had registers in main memory? This processor was used in TI's TI-99/4 home computer. (Both the processor and the home computer were big failures.)

https://spectrum.ieee.org/the-inside-story-of-texas-instrume...


Yes. I've used a Marinchip 9900, from John Walker's company before Autodesk.





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